Hello! I'm Arpita
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I am a Postdoctoral Research Fellow at SoC, National University of Singapore. I am an active developer of open-source Symbolic Execution tool TracerX. The TracerX Research Group is led by Prof. Joxan Jaffar.
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At NUS, I am working on Automated Program Analysis, Program Testing and Verification using Dynamic Symbolic Execution.
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I completed my Ph.D. in Computer Science at Indian Institute of Technology Kharagpur, India under the supervision of Prof. Rajib Mall and Prof. Pabitra Mitra.
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Research Interest:
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Dynamic Symbolic Execution
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Automated Fault Localization: Statistical and Machine Learning methods
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Software Testing: Modified Condition/Decision Coverage Testing, Concolic Testing, Pairwise Testing, Mutation Testing
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Arpita Dutta
Research Fellow
[Github] [Google Scholar] [CV]
Department of Computer Science
National University of Singapore (NUS)
Email:
Lab:
PL&SE Research Lab B41 (COM3)
EDUCATION
December 2020-Present
PostDoc
School of Computing, National University of Singapore,
Computing 1, 13 Computing Drive, Singapore 117417
Research Fellow
Supervisor: Prof. Joxan Jaffar
Research Area: Automated Program Analysis and Verification
July 2017-December 2020
Ph.D.
Indian Institute of Technology, Kharagpur,
West Bengal, 721302
Ph.D., Computer Science and Engineering
Supervisors: Prof. Rajib Mall and Prof. Pabitra Mitra
Research Area: Software Engineering and Machine Learning
July 2015-June2017
Master's Degree
National Institute of Technology, Rourkela,
Odhisha, 769008
M.Tech., Computer Science.
Supervisor: Prof. Durga Prasad Mohapatra
Research Area: Software Testing (MC/DC and Concolic Testing)
CGPA: 9.78 [Institute Silver Medal][1st in Department of CSE]
July 2010-June2014
Bachelor's Degree
Government Engineering College, Bilaspur, Chhattisgarh, 495009
B.E., Computer Science and Engineering
CGPA: 9.1
SELECTED PUBLICATIONS
[Complete List: Scopus, Google Scholar, DBLP]
Conferences
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A. Dutta, R. Maghareh, J. Jaffar, S. Godboley, XL. Yu, "TracerX: Pruning Dynamic Symbolic Execution with Deletion and Weakest Precondition Interpolation" (Competition Contribution). In Int. Conf. on Fundamental Approaches to Software Engineering, (FASE'24), Luxembourg, 2024. [Link to Paper][Artifact Available, Evaluated & Reusable][Zenodo]
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A. Dutta, "Enhancing Fault Localization by incorporating Statement Frequency and Test Case Contribution". In 23rd Int. Conf. on Software Quality, Reliability, and Security, (QRS'23), Thailand, pp. 128-137, 2023. [Link to Paper]
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S. Godboley, A. Dutta, R. K. Pisipati, D. P. Mohapatra, "SSG-AFL: Vulnerability detection for Reactive Systems using Static Seed Generator based AFL". 46th Annual Computers, Software, and Applications Conference, (COMPSAC'22), CA, USA, pp. 1728-1733, 2022. [Link to Paper] [Experimental Data]
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A. Dutta, "A Complete Unit Test Framework for Agile Software Development". In 6th International Conference on Lean and Agile Software Development, (LASD'22), Virtual, 2022. [Link to Paper] [Slides]
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A. Dutta, "EBFL-An Ensemble Classifier based Fault Localization". In 15th IIEEE Conference on Software Testing, Verification and Validation (ICST'22), Poster-Track, Virtual, 2022. (Core-A) [Link to Paper] [Poster]
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A. Dutta, R. Mall, "An Ensemble Classifier based Method for Effective Fault Localization". In 17th International Conference on Software Technologies, (ICSOFT'22), Lisbon. 2022. [Link to Paper]
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S. Godboley, M.R. Golla, A. Dutta, "KLEEMA: A DSE based Mutation Analyser". In POSTER track at 30th ACM SIGSOFT International Symposium on Software Testing and Analysis, (ISSTA'21), 2021. (Core-A) [Poster] [Code]
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S. Godboley, J. Jaffar, R. Maghareh, A. Dutta, "Toward Optimal MC/DC Test Case Generation". ACM SIGSOFT International Symposium on Software Testing and Analysis (ISSTA'21), 2021. (Core-A) [Link to Paper] [Artifact Available, Evaluated & Reusable][Zenodo]
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A. Dutta, and S. Godboley, "MSFL: A Model for Fault Localization Using Mutation-Spectra Technique", In 5th International Conference on Lean and Agile Software Development, 2021. [Link to Paper] [Slides] [Best Paper Award] [Selected for Journal Extension in COLA]
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A. Dutta, and R. Mall, "A Function Dependency based Approach for Fault Localization with D*". In 15th International Conference on Software Technologies, (ICSOFT'20) Held virtually, 2020. [Link to Paper] [Slides]
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A. Dutta, N. Pant, P. Mitra, R. Mall, "Effective Fault Localization using an Ensemble Classifier". International Conference on Quality, Reliability, Risk, Maintenance, and Safety Engineering (QR2MSE'19), Zhangjiajie, Hunan, China, 2019. [Link to Paper] [Best Paper Award]
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A. Dutta, R. Jain, S. Gupta, R. Mall, "Fault Localization Using a Weighted Function Dependency Graph", International Conference on Quality, Reliability, Risk, Maintenance, and Safety Engineering (QR2MSE'19), Zhangjiajie, Hunan, China, 2019. [Link to Paper]
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A. Dutta, R. Sahay, P. Mitra, R. Mall, "Predicate Proximity in Failure: An MLP based Fault-Localization approach". TENCON'19, Kerala, India, 2019. [Link to Paper]
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A. Dutta, S. Kumar, S. Godboley, "Enhancing Test Cases generated by Concolic Testing", 12th Innovations in Software Engineering Conference (ISEC'19), COEP Pune, 2019. [Link to Paper] [Slides]
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A. Dutta, S. Godboley, D.P. Mohapatra, "An efficient code coverage technique for UML StateChart Diagram". 14th International IEEE India Conference (INDICON'17), IIT Roorkee, India, December, 2017. [Link to Paper] [Slides]
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A. Dutta, S. Godboley, D.P. Mohapatra, "COLT: Extending CONCOLIC Testing to measure LCSAJ Coverage". 30th IEEE TENCON-16, Singapore, pp.373-378, 2016. [Link to Paper]
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S. Godboley, A. Dutta, B. Besra and D.P. Mohapatra, "Green-JEXJ: A new tool to measure energy consumption of improved concolic testing". 2015 International Conference on Green Computing and Internet of Things (ICGCIoT'15), Noida, pp. 36-41. 2015. [Link to Paper] [Best Paper Award]
Journals:
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S. K. Barisal, A. Dutta, S. Godboley, B. Sahoo, D. P. Mohapatra. "SMUP: A technique to improve MC/DC using specified patterns." Computers and Electrical Engineering 120 (2024): 109706. (SCI) [Link to Paper]
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S. S. Srivastava, A. Dutta, R. Mall, "Effective fault localization using probabilistic and grouping approach". Int. Journal of System Assurance Engineering and Management (IJSAEM), pp: 1-20, 2024. (SCOPUS) [Link to Paper]
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A. Dutta, S. S. Srivastava, S. Godboley, D. P. Mohapatra, "Combi-FL: Neural network and SBFL based fault localization using mutation analysis". Journal of Computer Languages (COLA), pp: , 66(8), 2021. (SCI) [Link to Paper]
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A. Dutta, A. Jha, R. Mall, "MuSim: Mutation based Fault Localization using Test Case Proximity". International Journal of Software Engineering and Knowledge Engineering (SEKE), 2020. (SCI) [Link to Paper]
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A. Dutta, R. Manral, P. Mitra, R. Mall, "Hierarchically Localizing Software Faults using DNN". IEEE Transaction on Reliability(TRel). 2019 (SCI) [Link to Paper]
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A. Dutta, A. Patel, R. Mall, "An Investigation into the Effectiveness of White-Box T-way Testing". IET Software, 2019. (SCI) [Link to Paper]
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A. Dutta, K. Kunal, S. S. Srivastava, S. Shankar, R. Mall, FTFL: A Fishers test-based approach for fault localization, Innovations in Systems and Software Engineering (ISSE), pp: 1-25, 2021. (Scopus) [Link to Paper]
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A. Maru, A. Dutta, V. Kumar, D. P. Mohapatra, Software fault localization using BP neural network based on function and branch coverage, Evolutionary Intelligence, 1-18, 2019. (Scopus) [Link to Paper]
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S. K. Barisal, A. Dutta, S. Godboley, B. Sahoo, D. P. Mohapatra, MC/DC guided Test Sequence Prioritization using Firefly Algorithm, Evolutionary Intelligence, 1-14, 2019. (Scopus) [Link to Paper]
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A. Dutta, S. Godboley, D. P. Mohapatra, HiRSA: Computing Hit Ratio for SOA applications through Tcases, International Journal of Computational Systems Engineering (IJCSYSE), Inderscience. 2017. [Link to Paper]
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S. Godboley, A. Dutta, D. P. Mohapatra, R. Mall, Scaling Modified Condition / Decision Coverage using Distributed Concolic Testing for Java programs, Computer Standards & Interfaces, Elsevier 2018. (SCI) [Link to Paper]
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S. Godboley, A. Dutta, D. P. Mohapatra, R. Mall, GECOJAP: A novel source-code preprocessing technique to improve code coverage. Computer Standards & Interfaces (CSI), Elsevier 2017. (Accepted) (SCI) [Link to Paper]
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S. Godboley, A. Dutta, D. P. Mohapatra, R. Mall, J3-Model: A novel framework for Improved Modied Condition/Decision Coverage Analysis. Computer Standards & Interfaces (CSI), Elsevier, Volume 50, pages 1-17, 2016. (SCI) [Link to Paper]
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S. Godboley, A. Dutta, A. Das, D. P. Mohapatra, R. Mall, Making a concolic tester achieve increased MC/DC, Innovations Systems and Software Engineering (ISSE), 12(4), 319-332, 2016. (Scopus) [Link to Paper]
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S. Das, A. Dutta, S. Sharma, S. Godboley, "A Comparative Analysis of a Novel Anomaly Detection Algorithm with Neural Networks". International Journal of Rough Sets and Data Analysis (IJRSDA), IGI Global, 2016. [Link to Paper]
ACHIEVEMENTS
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BEST PAPER AWARD at QR2MSE-2019, Zhangjiajie, Hunan, China.
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Received Institute Travel Grant to attend IIT Kharagpur listed Best Conference QR2MSE-2019.
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Received ISEC 2019 and ISEC 2018 Student Travel Grant Scholarship.
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SANDEEP MOHAPATRA MEMORIAL MEDAL at 58th Technical Annual Session (2017) by The Institute of Engineers (India).
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BEST PAPER AWARD from IEEE ICGCIoT-15 at Galgotia University, Noida, U.P in 2015.
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Ranked 2nd in Master of Technology (M.Tech) [Silver Medal ] at National Institute of Technology, Rourkela, batch 2015-2017 (1st in Department of CSE).
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Got Tution fee waivership for Bachelor of Engineering (2010-2014) by Chhattisgarh State Government based on HSS merit.
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I received INR 50,000 cash prize from Madhyamik Siksha Mandal C.G. India (2010).
RESPONSIBILITIES
Selected Professional Activities
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Program Committee Member of Artifact Evaluation@ICSE’25.
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Editorial Board Member of Information and Software Technology [IST] journal. (May 2024 - Present)
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Program Co-Chair of Artifact Evaluation Committee [APLAS 2022], December 2022, Auckland.
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Student Volunteer at RAPAST-2019 (Co-located with Tencon 2019), October 2019, India.
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Reviewer of Journals [Elsevier Review History Report]
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Technical Program Committee member:
Extra Activity/Recognization
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Vice-Chair of IEEE CS SBC, IIT KGP, 2019-2020
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Section Ambassador of IEEE Programming League Kharagpur, 2020
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Mentor at Grace Hopper Celebration India (GHCI) Codeathon, 2020
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Participated in Open Source Software World Challenge 2016, Korea, 2016.
Professional Society Membership
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IEEE Professional Membership (22nd Sep 2023 to 31st Dec 2024)
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IEEE Young Professional (22nd Sep 2023 to 31st Dec 2024)
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ACM Membership (11th July 2021 to 31st Dec 2022)
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IEEE Women in Engineering Membership (1st Jan 2020 to 31st Dec 2020)
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IEEE Computer Society Membership (1st Jan 2020 to 31st Dec 2020)
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IEEE Graduate Student Member (1st Aug 2019 to 31st Dec 2020)
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IEEE Student Member (1st Sep 2016 to 31st Dec 2016)
TALKS
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TracerX-Pruning Dynamic Symbolic Execution with Weakest Precondition Interpolation, 4th International KLEE Workshop on Symbolic Execution, Lisbon, 2024, [Co-located with ICSE'24] [Slides] [Poster] [Video]
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Toward Optimal MC/DC Test Case Generation, 3rd International KLEE Workshop on Symbolic Execution, 2022, London, UK. [Video]
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Hierarchically Localizing Software Faults Using DNN, Software Engineering Research in India (SERI'21), 2021, Online Event. [Slides]
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Advanced techniques for Software Fault Localization, National Level Webinar, Shri Kumarswami Mahavidylaya, AUSA, India. September 2021. [Slides]
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Hierarchically Localizing Software Faults Using DNN, IEEE NTC Student Chapter IIT Indore, India. August 2021. [Slides]